VLSI Engineer – L3 | Physical Place & Route | Wipro Careers | Bengaluru
⚙️ Career Opportunity: VLSI Engineer – L3 | Physical Place & Route | Wipro Careers | Bengaluru | Requisition ID: 64548
Are you passionate about VLSI design, digital hardware engineering, and chip verification? Do you have hands-on experience in physical place and route methodologies and enjoy developing highly efficient system-on-chip (SoC) architectures? If so, Wipro Limited invites you to apply for the position of VLSI Engineer – L3 based in Bengaluru, India.
This full-time role offers an opportunity to work at the heart of digital transformation, where your contributions help develop complex integrated circuits that power next-generation technologies across industries.
🌍 About Wipro
Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading global technology services and consulting company, serving clients across 65+ countries with a workforce of over 230,000 professionals. With a strong focus on innovation, digital engineering, and sustainability, Wipro helps enterprises achieve their boldest ambitions and build future-ready businesses.
Learn more at: www.wipro.com
📌 Job Overview
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Job Title: VLSI Engineer – L3
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Requisition ID: 64548
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Location: Bengaluru, India
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Department: Semiconductor Engineering & VLSI
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Employment Type: Full-time
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Experience Required: 3–5 years
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Mandatory Skill: VLSI Physical Place and Route
🎯 Role Purpose
The VLSI Engineer – L3 plays a crucial role in the design and development of VLSI (Very Large Scale Integration) systems. This position focuses primarily on physical place and route, architecture definition, functional verification, and implementation for client-specific semiconductor projects. You will work closely with cross-functional teams to build high-performance, scalable chip architectures that meet customer requirements and industry standards.
🔧 Key Responsibilities
1️⃣ Verification of IP Functionality & Debugging
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Understand and analyze the architecture of IP modules to design the appropriate verification environment.
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Develop verification plans using Universal Verification Methodology (UVM) standards.
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Create robust testbenches and write test case code to verify functional correctness of one or more IP blocks.
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Perform simulations, run test cases, and debug functional failures using tools like ModelSim, VCS, or Questa.
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Carry out functional coverage analysis and document results clearly and comprehensively.
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Run regression tests to validate system performance across all scenarios and platforms.
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Troubleshoot and optimize existing modules with minimal latency and maximum throughput.
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Write reusable verification scripts to streamline testing and improve future validation cycles.
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Ensure all verification steps comply with project timelines and quality standards.
2️⃣ VLSI Physical Design – Place & Route
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Perform RTL-to-GDSII flow, including floorplanning, placement, clock tree synthesis (CTS), and routing.
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Use physical design tools such as Cadence Innovus, Synopsys IC Compiler (ICC), or Mentor Olympus.
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Handle design constraints (SDC), timing reports, and area/power/performance trade-offs.
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Address DRC/LVS violations, IR drop analysis, and assist in physical verification closure.
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Optimize layouts for performance, power, and area (PPA) using advanced process nodes.
3️⃣ Documentation & Client Reporting
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Maintain proper documentation of:
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Test plans
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Test benches
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Scripts and methodologies
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Debugging procedures and error logs
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Prepare and share weekly and monthly status reports with clients and project leads.
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Log design changes, implementation notes, and improvement suggestions in a knowledge repository.
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Ensure timesheets and work logs are accurately maintained for project transparency and billing.
4️⃣ Knowledge Sharing & Self-Development
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Provide detailed knowledge transfer documentation for ongoing or completed projects.
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Take initiative in upskilling through internal platforms like Trend Nxt to prepare for higher-level roles.
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Participate in peer learning sessions and mentor junior engineers when required.
📈 Key Deliverables & Performance Metrics
Performance Area | KPI/Measure |
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Verification and Debugging | Timely execution, bug-free code, low defect rate |
Physical Design (Place & Route) | Accuracy of layout, PPA compliance, DRC/LVS closure |
Customer Satisfaction | Responsiveness, documentation quality, zero escalations |
Documentation & Reporting | Up-to-date logs, SharePoint entries, thorough project tracking |
Self-Learning | Skill certification, performance in internal assessments (Trend Nxt) |
📘 Required Skills and Qualifications
✅ Mandatory Skills
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VLSI Physical Place and Route (RTL-to-GDSII)
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Functional verification using UVM/OVM or similar verification methodologies
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Strong understanding of digital design principles and SoC architecture
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Knowledge of scripting languages such as TCL, Perl, Python
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Familiarity with simulation and synthesis tools like VCS, Synopsys DC, Cadence Genus
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Hands-on experience with DFT (Design for Test) is a plus
🎓 Educational Qualification
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Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, or VLSI Design
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Preferred certifications in VLSI Physical Design, Digital Design, or related specializations
🧠 Ideal Candidate Traits
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Highly detail-oriented with excellent debugging and problem-solving skills
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Strong analytical abilities with a deep understanding of timing, power, and signal integrity
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Excellent documentation and communication skills
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Ability to work independently and collaboratively in a fast-paced environment
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Demonstrates accountability, ownership, and initiative in every stage of the project
📅 A Day in the Life
Your typical day starts with reviewing overnight regression test logs and physical design runs. You debug a failed test case in an IP block and document your fix in SharePoint. You then shift focus to refining place-and-route for a 28nm layout, ensuring clock tree balance and minimizing routing congestion. In the afternoon, you sync with a project manager and present weekly test coverage status. Before wrapping up, you work on optimizing scripts to speed up simulation time.
Your work directly impacts semiconductor product quality, reliability, and customer satisfaction.
🌟 Why Join Wipro as a VLSI Engineer?
🌐 Cutting-edge Projects
Work on advanced semiconductor and digital design projects with global clients across industries like automotive, IoT, AI, and 5G.
💼 Career Growth
Leverage structured development programs, certifications, and performance pathways to accelerate your career in VLSI design.
🤝 Collaborative Culture
Work alongside multidisciplinary teams, engineers, and solution architects in a high-tech, innovative environment.
🧘 Work-Life Balance
Flexible work hours, wellness programs, and inclusive policies help maintain a healthy professional life.
💰 Compensation & Benefits (Indicative)
VLSI Engineers at Wipro are offered a competitive package that includes:
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Market-aligned annual compensation
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Performance-linked bonuses
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Comprehensive health and life insurance
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Paid leave, wellness days, and employer-contributed retirement plans
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Access to global certifications and internal learning portals
♿ Diversity and Inclusion
Wipro is an equal opportunity employer that encourages applications from candidates of all backgrounds, including individuals with disabilities. We provide reasonable accommodations during recruitment and onboarding to ensure accessibility and inclusivity.
📥 How to Apply
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Visit the official Wipro Careers Portal:
🔗 www.wipro.com/careers -
Search for Requisition ID: 64548 or “VLSI Engineer – L3”
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Complete the application form and upload your updated resume
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Shortlisted candidates will be contacted for technical assessments and interviews